The AI agent layer for electronics design

We catch the logical design errors hidden between documents.

SECA structures requirements, schematics, RTL and BOMs into one design graph, generates drafts on top of it, and verifies them with cited evidence — before the design ships. Deployed on-premises.

Engineers drown in documents.
They should design.

0%+

of engineering time is spent reading documents — not designing

0%+

of design errors slip through review and come back as rework

Hardware data is fragmented.

Requirements live in systems-team PDFs, schematics and RTL in EDA tools, BOMs in ERP and Excel, defect history in QA documents. One change must land in every one of them — by hand, today.

  • Requirements

    PDF · Word — systems team

    • PDF
    • DOCX
    • XLSX
  • Schematics · RTL

    EDA — circuit team

    • SCH
    • .V
    • SPICE
  • BOM · Specs

    ERP · PLM · Excel — purchasing

    • SAP
    • 3DX
    • XLSX
    • STEP
  • Defect history

    Docs · Excel — QA team

    • DOC
    • XLSX
    • JIRA

Structuring, generation, and verification on one hardware-native ontology.

Scattered design artifacts flow into SECA's design-data layer; three agent modules run on top of it, and the results flow back into the EDA, PLM and document tools you already use.

Scattered design artifacts
  • Requirements
  • Circuits · RTL
  • 2D Drawings
  • BOM · Specs
  • Defect History

SECA — Design Data Orchestration Layer

On-premises
  1. 01

    Structuring

    Hardware design artifacts — requirements, drawings, circuits — are structured into one ontology, every value with its source.

  2. 02

    Generation

    Designs are generated on top of it — architecture and block diagrams, BOM drafts, and onward to circuits.

  3. 03

    Verification

    AI agents check designs against the ontology, surfacing logical errors and omissions with evidence.

Existing design tools
  • EDA
  • PLM
  • Requirements Management
  • Excel · Documents

Signed. Paid. Proven.

Measured on PoC data with paying customers.

  • −90%

    requirement review time

    Chip design — verification

    Requirements structured and verification items generated automatically — review time cut 90%

    DB
  • 2 h → 10 min

    per part reviewed

    Appliance — parts search

    Drawings and BOMs structured into a knowledge graph; spec-compatible alternative parts recommended with evidence

    LG Electronics
  • −66%

    first-draft effort

    Automotive — block diagram & parts

    Requirements to part-family selection, pin verification and block diagram — 480 → 160 h per month

    LG Electronics

Partners &
Customers

  • LG Electronics
  • DB
  • BOS Semiconductor
  • Mercedes-Benz
  • KEPCO
  • Airbus
  • HL Robotics
  • NVIDIA Inception
  • AWS Startup Programs
  • 500 Global
  • Hyundai Motor Group
  • Bluepoint Partners

Case studies are shared on request.

Tell us your industry and use case and we will email the relevant material — part matching & recommendation, requirement-driven design automation, semiconductor reverse engineering.

AI catches the logical design errors
that people miss.

SECA Labs builds AI agents for electronics and hardware design. Hardware design produces dozens of artifacts — schematics, BOMs, datasheets, layouts, requirement documents — and mismatches between them lead to design errors, production delays and quality incidents. Until now that verification has relied on human eyes and experience.

SECA structures design artifacts into one design graph and analyzes cross-document relationships automatically, surfacing the logical design errors people tend to miss — with cited evidence. SECA spun off from LG Electronics' in-house venture program Studio341 in June 2026 and raised seed funding from LG Electronics and BluePoint Partners.

Legal name
SECA Labs Inc. (주식회사 세카)
Founded
June 2026 · spin-off from LG Electronics
CEO
Junhyung Kim
Investors
LG Electronics · BluePoint Partners (seed)
Headquarters
Seoul, Korea · NAVER D2SF Gangnam
Field
AI agents for electronics & hardware design
The SECA team

Junhyung Kim Founder & CEO

Led Hyundai Motor projects at LG Electronics Vehicle Solutions before founding SECA to close the gap between AI research and real hardware design.

LinkedIn
  1. 2026.09Exhibited at AW Vietnam 2026 (Hanoi) · finalist, AW: Beyond Next startup IR
  2. 2026.08Selected for the US track of Gyeonggi's AI global joint-research program
  3. 2026.08Seed round from LG Electronics and BluePoint Partners
  4. 2026.07Exhibited in the Korean pavilion at WAIC 2026, Shanghai
  5. 2026.06SECA Labs incorporated · LG Electronics spin-off · KB Unicorn Club 6
  6. 2026.04Studio341 spin-off selection · Seongnam CHAMP grand prize · KIC China encouragement award
  7. 2026.03Silver award, AW 2026 Open Innovation Round
  8. 2025.11Selected for Studio341 season 2 (LG Electronics · BluePoint)

Contact

Product, partnership and press inquiries — by form or email. We reply within 24 hours.

jjunkim@secalabs.com

Location

14 Seochodae-ro 74-gil, Seocho-gu, SeoulSamsung Fire Tower 18FNAVER D2SF Gangnam

Agents execute.
Engineers lead.

A handful of sample artifacts is enough. We will show you what gets caught in your own data.

Careers